ADSP-TS201S processor equivalent, tigersharc-r embedded processor.
Up to 600 MHz, 1.67 ns Instruction Cycle Rate 24M Bits of Internal—On-Chip—DRAM Memory 25×25 mm (576-Ball) Thermally Enhanced Ball Grid Array Package Dual Computation Blo.
Performs Exceptionally Well on DSP Algorithm and I/O Benchmarks (See Benchmarks in Table 1) Supports Low-Overhead DMA Tr.
......... 3 Dual Compute Blocks .... 4 Data Alignment Buffer (DAB) .... 4 Dual Integer ALU (IALU) ......... 4 Program Sequencer ....... 5 Interrupt Controller ... 5 Flexible Instruction Set 5 DSP Memory ..... 5 External Port (Off-Chip Memory/Periphe.
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